Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure

Spin-on Methylsilsesquioxane (MSQ) exhibits low dielectric constant and is an important and promising material to reduce parasitic capacitive coupling between metal layers in semiconductor integrated circuits. However, MSQ has lower film density and therefore more porous than the traditional silicon...

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Datum:2003
Hauptverfasser: Aw, K.C., Ibrahim, K.
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Sprache:English
Veröffentlicht: Інститут фізики напівпровідників імені В.Є. Лашкарьова НАН України 2003
Schriftenreihe:Semiconductor Physics Quantum Electronics & Optoelectronics
Online Zugang:http://dspace.nbuv.gov.ua/handle/123456789/118103
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Zitieren:Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure / K.C. Aw, K. Ibrahim // Semiconductor Physics Quantum Electronics & Optoelectronics. — 2003. — Т. 6, № 4. — С. 524-527. — Бібліогр.: 12 назв. — англ.

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spelling irk-123456789-1181032017-05-29T03:03:10Z Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure Aw, K.C. Ibrahim, K. Spin-on Methylsilsesquioxane (MSQ) exhibits low dielectric constant and is an important and promising material to reduce parasitic capacitive coupling between metal layers in semiconductor integrated circuits. However, MSQ has lower film density and therefore more porous than the traditional silicon dioxide (SiO₂) film and could pose reliability issues. This paper is an extension to previous paper [1], which reported that evaporated copper (Cu) onto spin-on MSQ has high leakage current and provides two alternative models with the aid of energy band diagrams to describe the effect of evaporated Cu onto spin-on MSQ using Metal Oxide Semiconductor capacitor (MOSC) structure. 2003 Article Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure / K.C. Aw, K. Ibrahim // Semiconductor Physics Quantum Electronics & Optoelectronics. — 2003. — Т. 6, № 4. — С. 524-527. — Бібліогр.: 12 назв. — англ. 1560-8034 PACS: 42.55 Rz http://dspace.nbuv.gov.ua/handle/123456789/118103 en Semiconductor Physics Quantum Electronics & Optoelectronics Інститут фізики напівпровідників імені В.Є. Лашкарьова НАН України
institution Digital Library of Periodicals of National Academy of Sciences of Ukraine
collection DSpace DC
language English
description Spin-on Methylsilsesquioxane (MSQ) exhibits low dielectric constant and is an important and promising material to reduce parasitic capacitive coupling between metal layers in semiconductor integrated circuits. However, MSQ has lower film density and therefore more porous than the traditional silicon dioxide (SiO₂) film and could pose reliability issues. This paper is an extension to previous paper [1], which reported that evaporated copper (Cu) onto spin-on MSQ has high leakage current and provides two alternative models with the aid of energy band diagrams to describe the effect of evaporated Cu onto spin-on MSQ using Metal Oxide Semiconductor capacitor (MOSC) structure.
format Article
author Aw, K.C.
Ibrahim, K.
spellingShingle Aw, K.C.
Ibrahim, K.
Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure
Semiconductor Physics Quantum Electronics & Optoelectronics
author_facet Aw, K.C.
Ibrahim, K.
author_sort Aw, K.C.
title Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure
title_short Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure
title_full Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure
title_fullStr Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure
title_full_unstemmed Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure
title_sort dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure
publisher Інститут фізики напівпровідників імені В.Є. Лашкарьова НАН України
publishDate 2003
url http://dspace.nbuv.gov.ua/handle/123456789/118103
citation_txt Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure / K.C. Aw, K. Ibrahim // Semiconductor Physics Quantum Electronics & Optoelectronics. — 2003. — Т. 6, № 4. — С. 524-527. — Бібліогр.: 12 назв. — англ.
series Semiconductor Physics Quantum Electronics & Optoelectronics
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AT ibrahimk dualmodeldescribingeffectsofevaporatedmetalgateonlowkdielectricmethylsilsesquioxaneinmetaloxidesemiconductorcapacitorstructure
first_indexed 2025-07-08T13:22:13Z
last_indexed 2025-07-08T13:22:13Z
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fulltext Semiconductor Physics, Quantum Electronics & Optoelectronics. 2003. V. 6, N 4. P. 524-527. © 2003, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine524 PACS: 42.55 Rz Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure K.C. Aw* and K. Ibrahim School of Applied Physics, University Science of Malaysia, 11800 Penang, Malaysia *e-mail: kcaw@xtra.co.nz, kamarul@usm.my Abstract. Spin-on Methylsilsesquioxane (MSQ) exhibits low dielectric constant and is an important and promising material to reduce parasitic capacitive coupling between metal layers in semiconductor integrated circuits. However, MSQ has lower film density and there- fore more porous than the traditional silicon dioxide (SiO2) film and could pose reliability issues. This paper is an extension to previous paper [1], which reported that evaporated copper (Cu) onto spin-on MSQ has high leakage current and provides two alternative models with the aid of energy band diagrams to describe the effect of evaporated Cu onto spin-on MSQ using Metal Oxide Semiconductor capacitor (MOSC) structure. Keywords: methylsilsesquioxane, low dielectric constant, Cu+ injection, MSQ thinning. Paper received 13.08.03; accepted for publication 11.12.03. 1. Introduction An alternative technique to increase the speed of Very Large Scale Integration (VLSI) device is to reduce the dielectric constants of insulating material separating the various layers, which reduces the parasitic capacitance. This gives rise to a type of material termed as low-k di- electric constant. There are two categories of low-k di- electric material based on the deposition method, i.e. che- mical vapour deposition (CVD) or spin-on glass (SOG). However, low-k dielectric materials using spin-on process have several problems, such as metal diffusion [2], which affect the reliability of VLSI devices. Methyl- silsesquioxane (MSQ400F) produced by Filmtronics was used in this research. MSQ400F SOG is based on a unique chemistry that yields a polymer with Si-CH3 and Si-O bonds and has a low dielectric (k) of 2.6. It has been reported that cured MSQ thin film has been successfully prepared by spinning process and its mechanical proper- ties are very promising to be used to replace silicon diox- ide (SiO2) as interlayer dielectric [3]. Fabricated MOS capacitors (MOSC) with either evaporated Al or Cu gate were used in this study. Thin SiO2 layer was also grown as a barrier material to pre- vent metal diffusion [4,5,6]. The thermal activation energy of MSQ has been re- ported not to be highly thermal accelerated and is re- ported to be 0.35eV [7]. This showed that MSQ thermal degradation mechanism would be quite similar to SiO2. 2. Experimental set-up Simple MOSC structure was used to study the electrical characteristics of MSQ used as dielectric material. Two types of MOCS structures were fabricated as shown in Fig. 1. MOSC-1a structure consists of p-substrate, a 150Å SiO2, MSQ and evaporated Al gate, while MOSC-1b con- sists of p-substrate, a 150Å SiO2, MSQ and evaporated Cu gate. The 150Å SiO2 is grown using dry oxidation technique at 1000°C for 10 minutes. MSQ was deposited using spin-on technique using a spinner to achieve a thick- ness of 4000Å. The deposited MSQ using spin-on tech- nique was soft baked to drive out moisture by baking in three stages at 100°C for 2 minutes, 180°C for 2 minutes and then 200°C for 1 minute. The MSQ was cured in N2 ambient at 400°C for 30 minutes [8] after soft baking. K.C. Aw*, K. Ibrahim: Dual model describing effects of evaporated metal gate on... 525SQO, 6(4), 2003 Gate metal (Al or Cu) and substrate contact were depos- ited using evaporation technique and were then annealed at 350°C for 30 minutes in N2 ambient. In this experiment, only samples with leakage current that meet the testing criteria (<100 pA at ± 1 V) were sub- jected to bias-temperature stress (BTS) at +10 V and 85°C. During BTS, the HP Semiconductor Parameter Analyser was used to measure the leakage current over time. High- frequency (100 KHz) C-V plots were also taken for each MOSC structure using Kiethley C-V/I-V measurement unit. In addition, C-V plots after high constant positive or nega- tive voltage stresses were also taken. All measurements were carried out in a light tight Faraday box using Micro- manipulator prober with a thermal chuck. 3. Experimental results Fig. 2 show that MOSC-1b has greater leakage current over time during BTS. C-V plots in Fig. 3 show that MOS- 1a does not shift with either +20V or �20V constant gate voltage stressed for 3 minutes. However, MOS-1b showed right-hand shift in flat-band voltage (VFB) only after +20V stress as shown in Figure 4 suggested that there are trapped negative electrons in the MOSC-1b capacitor after +20V stress. Since the stress was performed at room temperature, the negative charge could not be due to mobile charge, which is accelerated with temperature rather than by electric field. 4. Discussion The sandwiched SiO2 has a dielectric strength of 10 MV/ cm and this proved that during BTS the dielectric break- down voltage of the SiO2 has not been exceeded and no electrons from the silicon substrate should tunnel through under the influence of positive gate voltage. MOSC-1b has poorer reliability than MOSC-1a since it has higher leakage current in during BTS and also has VFB shifts when subjected to +20 V constant voltage stress for 3 mi- nutes. Two models will be proposed in this paper, which can explain the observations made in this research. The models are namely termed as copper ions injection due to interface degradation model and substrate electron in- jection due to MSQ thinning model. 5. The model of copper ions injection due to interface degradation This model attempts to explain that positive charge in- jection reaching the silicon substrate from evaporated Cu gate is significantly larger than evaporated Al gate and assumes the Cu+ drift/diffusion effect [9,10]. The high thermal energy required to evaporate Cu is condensed on the MSQ during deposition and this causes defect to the MSQ structure and therefore provide little barrier to the Cu+ injection during high positive voltage stress at room temperature. These high-energy injected positive Cu+ ions could dislodge electrons in the silicon substrate when reaching the substrate with high energy. This dislodge electrons in the substrate will then be in- jected back towards the SiO2 barrier layer due to the Fig. 1. Cross-section view of various MOSC structures used. 1 1.5 2 0 200 400 600 800 1000 T im e, s I/ In it M O S C -1 a M O S C -1 b Fig. 2. Plot of leakage current versus stress time of MOSC-1a and MOSC-1b during BTS. 0.91 0.93 0.95 0.97 0.99 1 �20 �5 �10 �5 0 5 10 15 20 Vo lta ge , V C /C m sq I n it ia l – 20 V + 2 0V Fig. 3. C-V plot of MOSC-1a after constant voltage stress for 3 minutes 526 SQO, 6(4), 2003 K.C. Aw*, K. Ibrahim: Dual model describing effects of evaporated metal gate on... high positive bias at the gate and then trapped in the SiO2 layer since these generated electrons do not have suffi- cient energy to tunnel through the SiO2 layer back to- wards the Cu gate. These trapped electrons causes right- hand shift in the flat-band voltage during the CV meas- urement. This trapped electrons together with the posi- tive gate voltage increases the overall electrical field across the MSQ and further increase the positive ions injection towards the MSQ and this explains why MOSC- 1b has its leakage current increasing much greater than MOSC-1a over time during BTS stress. On the other hand, there are less Al+ ions tunnelling through the MSQ because there were less structure de- fects in the MSQ since Al requires lower thermal energy to evaporate. Since there are less Al+ ions tunnelling through the MSQ, the amount of dislodge electrons will be insignificant to cause any flat-band voltage shift in the C-V curve. A generalised model to describe these ob- servations is shown in Fig. 5. 6. Substrate electron injection due to MSQ thinning model Another model that can be used to describe the effect is based on the fact that since Cu requires higher thermal energy to evaporate, this energy will be released to the MSQ layer to reach equilibrium when copper is depos- ited and condensed as mentioned in the previous model. This higher energy will cause structure defects in the MSQ near the Cu/MSQ interface. Since aluminium requires lower energy to evaporate, there are much lesser struc- ture defects in the MSQ at the Al/MSQ interface. Fig. 6 illustrates this phenomenon. The MSQ structure defects at the Cul/MSQ interface will not behave as an insulator and this cause significant thinning of the effective MSQ insulation thickness (deff) in the MOSC-1b than MOSC- 1a [11]. Since, the deff in MOSC-1b is thinner, the electric field in the MSQ (EMSQ = Vgate/deff) will be higher, creat- ing greater inversion layer in the p-substrate that increases the probability of electrons injection towards the Cu gate direction. However, these injected electrons do not have sufficient energy to tunnel through the SiO2 layer and will be trapped this layer. These trapped electrons will cause positive shift in the C-V plot when the gate is subjec- ted to high positive voltage. This is illustrated in Fig. 7. Vo lta ge , V 0.94 0.96 0.98 1 �30 �20 �10 0 10 In it ia l – 20 V + 2 0V C /C m sq Fig. 4. C-V plot of MOSC-1b after constant voltage stress for 3 minutes. + + + +_ E = hf Cu e Trapped electrons � � � Fig. 5. Energy band diagram illustrating proposed Cu+ injection under positive gate voltage. For purpose of illustration, the band diagram structure of the MSQ low-k dielectric is assumed to match that of the SiO2. MSQ xxx xxx xxx xxx xxx xxx deff Cu P substrate MSQ deff Al P substrate SiO2 x x x x x x X – denote structure damage in MSQ Fig. 6 Illustration of thinning of effective insulation thickness (deff) in (a) MSQ with Cu gate (b) MSQ with Al gate. a b K.C. Aw*, K. Ibrahim: Dual model describing effects of evaporated metal gate on... 527SQO, 6(4), 2003 8. Acknowledgement The authors would like to thank Dr. Mat Johar and Miss Ee Bee Choo of University Science Malaysia for their help with the C-V meter measurement and clean-room support respectively. The authors would also like to thank Altera Corporation, Penang for the use of micro prob- ing, HP Semiconductor Parameter Analyser, and Chemi- cal Lab facility. References 1. K.C. Aw, K. Ibrahim, Thin Solid Films, Vol. 434, (2003), pp. 178-182. 2. K.C Aw, K. Ibrahim, M.O. Wong, J. Solid State Science and Technol. Lett. (Supplementary), 8, (2001), p.18. 3. Kwang-Hun Kim, Dong Jung Lee, Hee-Woo Rhee, J. Ko- rean Physical Soc., 39, (2001), p.119. 4. J.D. McBrayer, J. Electrochem. Soc., 133, (1986), p.1242. 5. K.C. Aw, K. Ibrahim, in: S. Shaari, B.Y. Majlis (Eds.), Pro- ceedings of 2002 IEEE International Conference On Semi- conductor Electronics, Malaysia, December 19-21, 2002, p. 33. 6. K.C. Aw, K. Ibrahim, in: S. Shaari, B.Y. Majlis (Eds.), Pro- ceedings of the 2001 IEEE National Symposium on Micro- electronics Conference, Malaysia, November 12-13,, 2001, p. 107. 7. K.C. Aw, K. Ibrahim, in: S. Shaari, B. Y. Majlis (Eds.), Pro- ceedings of 2002 IEEE International Conference On Semi- conductor Electronics, Malaysia, December 19-21, 2002, p. 36. 8. Filmtronics Inc., Application Notes on Spin-on Glasses, Re- vision No.5, June 1998. 9. Alvin L.S. Loke, Jeffrey T. Wetzel, Paul H. Townsend, Tsuneaki Tanabe, Raymond N. Virtis, Melvin P. Zussman, Devendra Kumar, Changsup Ryu, S. Simon Wong, IEEE Trans. on Electron Devices, 46, (1999), 2178. 10. Alvin L.S. Loke, C. Ryu, C.P. Yue, J.S.H. Cho, S.S. Wong, IEEE Electron Device Lett., 17, (1996), p.549. 11. Po-Tsun Liu, IEEE Trans on Electron Devices, 47, (2000), p.1733. 12. G. Raghavan, C. Chiang, P.B. Anders, S.M. Tzeng, R. Villasol, G. Bai, M. Bohr, D.B. Fraser, Thin Solid Films, Vol. 262, (1995), p.168. + � � � _ Trapped electrons � � � Inversion layer Bending due to increase in electric field Fig. 7. Energy band diagram describing the injection of inver- sion electrons and trapped in the SiO2 layer. For purpose of illustration, the band diagram structure of the MSQ low-k di- electric is assumed to match that of the SiO2. 7. Conclusions MOS capacitor with evaporated Cu gate has poorer reli- ability than evaporated Al gate. The injection of Cu+ and accumulation of these trapped electrons could lead to dielectric wear-out [12]. Therefore, a suitable barrier layer between the metal gate and MSQ is necessary to prevent these occurrences.