A neural computation to study the scaling capability of the undoped DG MOSFET

The DG MOSFET is one of the most promising candidates for further CMOS scaling beyond the year of 2010. It will be scaled down to various degrees upon a wide range of system/circuit requirements (such as high-performance, low standby power and low operating power). The key electrical parameter of...

Повний опис

Збережено в:

Бібліографічні деталі
Дата:	2008
Автори:	Djeffal, F., Guessasma, S., Benhaya, A., Bendib, T.
Формат:	Стаття
Мова:	English
Опубліковано:	Інститут фізики напівпровідників імені В.Є. Лашкарьова НАН України 2008
Назва видання:	Semiconductor Physics Quantum Electronics & Optoelectronics
Онлайн доступ:	http://dspace.nbuv.gov.ua/handle/123456789/118884
Теги:	Додати тег Немає тегів, Будьте першим, хто поставить тег для цього запису!
Назва журналу:	Digital Library of Periodicals of National Academy of Sciences of Ukraine
Цитувати:	A neural computation to study the scaling capability of the undoped DG MOSFET / F. Djeffal, S. Guessasma, A. Benhaya, T. Bendib // Semiconductor Physics Quantum Electronics & Optoelectronics. — 2008. — Т. 11, № 2. — С. 196-202. — Бібліогр.: 11 назв. — англ.

Репозитарії

Digital Library of Periodicals of National Academy of Sciences of Ukraine

id	irk-123456789-118884
record_format	dspace
spelling	irk-123456789-1188842017-06-02T03:03:24Z A neural computation to study the scaling capability of the undoped DG MOSFET Djeffal, F. Guessasma, S. Benhaya, A. Bendib, T. The DG MOSFET is one of the most promising candidates for further CMOS scaling beyond the year of 2010. It will be scaled down to various degrees upon a wide range of system/circuit requirements (such as high-performance, low standby power and low operating power). The key electrical parameter of the DG MOSFET is the subthreshold swing (S). In this paper, we present the applicability of the artificial neural network for the study of the scaling capability of the undoped DG MOSFET. The latter is based on the development of a semi-analytical model of the subthreshold swing (S) using the Finite Elements Method (FEM). Our results are discussed in order to draw some useful information about the ULSI technology. 2008 Article A neural computation to study the scaling capability of the undoped DG MOSFET / F. Djeffal, S. Guessasma, A. Benhaya, T. Bendib // Semiconductor Physics Quantum Electronics & Optoelectronics. — 2008. — Т. 11, № 2. — С. 196-202. — Бібліогр.: 11 назв. — англ. 1560-8034 PACS 85.30.-z, 07.05.Mh, 68.65.-k, 85.35.-p http://dspace.nbuv.gov.ua/handle/123456789/118884 en Semiconductor Physics Quantum Electronics & Optoelectronics Інститут фізики напівпровідників імені В.Є. Лашкарьова НАН України
institution	Digital Library of Periodicals of National Academy of Sciences of Ukraine
collection	DSpace DC
language	English
description	The DG MOSFET is one of the most promising candidates for further CMOS scaling beyond the year of 2010. It will be scaled down to various degrees upon a wide range of system/circuit requirements (such as high-performance, low standby power and low operating power). The key electrical parameter of the DG MOSFET is the subthreshold swing (S). In this paper, we present the applicability of the artificial neural network for the study of the scaling capability of the undoped DG MOSFET. The latter is based on the development of a semi-analytical model of the subthreshold swing (S) using the Finite Elements Method (FEM). Our results are discussed in order to draw some useful information about the ULSI technology.
format	Article
author	Djeffal, F. Guessasma, S. Benhaya, A. Bendib, T.
spellingShingle	Djeffal, F. Guessasma, S. Benhaya, A. Bendib, T. A neural computation to study the scaling capability of the undoped DG MOSFET Semiconductor Physics Quantum Electronics & Optoelectronics
author_facet	Djeffal, F. Guessasma, S. Benhaya, A. Bendib, T.
author_sort	Djeffal, F.
title	A neural computation to study the scaling capability of the undoped DG MOSFET
title_short	A neural computation to study the scaling capability of the undoped DG MOSFET
title_full	A neural computation to study the scaling capability of the undoped DG MOSFET
title_fullStr	A neural computation to study the scaling capability of the undoped DG MOSFET
title_full_unstemmed	A neural computation to study the scaling capability of the undoped DG MOSFET
title_sort	neural computation to study the scaling capability of the undoped dg mosfet
publisher	Інститут фізики напівпровідників імені В.Є. Лашкарьова НАН України
publishDate	2008
url	http://dspace.nbuv.gov.ua/handle/123456789/118884
citation_txt	A neural computation to study the scaling capability of the undoped DG MOSFET / F. Djeffal, S. Guessasma, A. Benhaya, T. Bendib // Semiconductor Physics Quantum Electronics & Optoelectronics. — 2008. — Т. 11, № 2. — С. 196-202. — Бібліогр.: 11 назв. — англ.
series	Semiconductor Physics Quantum Electronics & Optoelectronics
work_keys_str_mv	AT djeffalf aneuralcomputationtostudythescalingcapabilityoftheundopeddgmosfet AT guessasmas aneuralcomputationtostudythescalingcapabilityoftheundopeddgmosfet AT benhayaa aneuralcomputationtostudythescalingcapabilityoftheundopeddgmosfet AT bendibt aneuralcomputationtostudythescalingcapabilityoftheundopeddgmosfet AT djeffalf neuralcomputationtostudythescalingcapabilityoftheundopeddgmosfet AT guessasmas neuralcomputationtostudythescalingcapabilityoftheundopeddgmosfet AT benhayaa neuralcomputationtostudythescalingcapabilityoftheundopeddgmosfet AT bendibt neuralcomputationtostudythescalingcapabilityoftheundopeddgmosfet
first_indexed	2025-07-08T14:50:05Z
last_indexed	2025-07-08T14:50:05Z
_version_	1837090688331677696
fulltext	Semiconductor Physics, Quantum Electronics & Optoelectronics, 2008. V. 11, N 2. P. 196-202. © 2008, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine 196 PACS 85.30.-z, 07.05.Mh, 68.65.-k, 85.35.-p A neural computation to study the scaling capability of the undoped DG MOSFET F. Djeffal1,, S. Guessasma2, A. Benhaya1, T. Bendib1 1LEA, University of Batna, Algeria 2LERMPS-UTBM, Site de Sevenans, Belfort – France Corresponding author: phone: +213 73796503; fax: +213 33805494 E-mail: djeffaldzdz@yahoo.fr Abstract. The DG MOSFET is one of the most promising candidates for further CMOS scaling beyond the year of 2010. It will be scaled down to various degrees upon a wide range of system/circuit requirements (such as high-performance, low standby power and low operating power). The key electrical parameter of the DG MOSFET is the subthreshold swing (S). In this paper, we present the applicability of the artificial neural network for the study of the scaling capability of the undoped DG MOSFET. The latter is based on the development of a semi-analytical model of the subthreshold swing (S) using the Finite Elements Method (FEM). Our results are discussed in order to draw some useful information about the ULSI technology. Keywords: artificial neural network, DG MOSFET, subthreshold swing, scaling capability. Manuscript received 09.11.07; accepted for publication 15.05.08; published online 30.07.08. 1. Introduction Over the past three decades, the primary driver of the exponential improvements in integrated circuit performance has been the scaling of transistor dimensions. The inherent benefits of MOSFET scaling are the speed improvement and energy reduction associated with a binary-logic transition. As the MOSFET is scaled below the 100 nm technology node the advantages of MOSFET scaling are diminished by the short channel effects [1]. The double-gate (DG) MOSFET shown in Fig. 1a has been identified in the International Technology Roadmap for Semiconductors (ITRS) as the most promising device structure. It enables further CMOS scaling beyond the 65 nm technology node (with 25 nm physical gate length). Moreover, it is known for its higher drive current, improved subthreshold slope, improved short channel effect control and potential circuit design flexibility [1-3]. The key electrical parameter that indicates the impact of short-channel effects on a MOSFET is the subthreshold swing (S). This is defined as the required change in the gate voltage that results in an order-of-magnitude change in the subthreshold drain current. The previous (S) model by B. Agrawal [4] was developed assuming the subthreshold current flows at the Si/SiO2 surfaces as in bulk devices. However, Y. Tosaka et al. [5] proposed the S model based on simulations that the punch through current dominantly flows at the SOI centre, but no explanations were provided. On the other hand, the modeling of transistor DG MOSFET is currently made in an analytical way [6]. This modeling requires several simplifying assumptions, generally necessary to lead to analytical expressions in order to study the various characteristics of the transistor. The 2D semi-analytical study, which constitutes the essence of our work, does not use any simplifying assumption. In our case, one solves the two-dimensional (2D) Poisson-Boltzmann nonlinear equation in the channel by using the finite element method and develops a semi-analytical model for (S) based on polynomial interpolation. Assuming a concept of effective conducting path [6], the model explains the dependence of S according to the doping of the channel and the effect of the various parameters. In this paper, we present the applicability of neural networks for the study of the scaling capability of the undoped DG MOSFET. The database used for the optimization of the neural network is built as based on a semi-analytical model of the subthreshold swing (S) developed using the Finite Elements Method (FEM). 2. Modelling techniques 2.1. Finite elements formulation The silicon film is assumed to be fully depleted (FD) for the values of NA and tSi of interest Fig. 1b. Under this FD Semiconductor Physics, Quantum Electronics & Optoelectronics, 2008. V. 11, N 2. P. 196-202. © 2008, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine 197 condition, the short channel (S) model of the DG MOSFET under various modes of operation (symmetric and asymmetric) is to be developed being based on the 2D analysis of the electrostatics in the channel by solving the nonlinear Poisson-Boltzmann equation of the following form: )( Si nNq A + ε =∆Ψ , (1a) where the electrostatic potential Ψ is referenced to the Fermi level. The free electron concentration n follows the classic Boltzmann distribution as ( )Fφ−Ψβ= enn i , (1b) where φF is the difference between the Fermi level and the electron quasi-Fermi level to account for the non- equilibrium condition. The boundary conditions for Ψ are found by satisfying the continuity of both the potential and the normal component of the electric displacement at the Si / SiO2 interfaces; and continuity of the potential at the source/drain sides: 0Si ox eff, ox ),()0,( =∂ Ψ∂ ε= Ψ− ε y B y yx t xV , (2) Si ),(),( Si ox Sieff, ox ty F y yx t txV =∂ Ψ∂ ε= Ψ− ε (3) ( ) ibiVy ,,0 =Ψ , (4) ( ) DSibi VVyL +=Ψ ,, , (5) where Vbi,i is the junction voltage between the source/drain and intrinsic silicon, ( ) ( )iSDibi nNqkTV /ln/ /, = , ND/S is the source/drain doping concentration, and VDS is the drain-to-source voltage. The effective voltages at the front and bottom gates, VF,eff and VB,eff, are introduced to simplify notations and are defined as follows: ( ),,eff, iMFFGSF VV Φ−Φ−= ( ),,eff, iMBBGSB VV Φ−Φ−= (6) where Φi is the work function of intrinsic silicon. When VF,eff = VB,eff, the electric field in the vertical (y) direction is symmetric y = tSi / 2, which yields a symmetric DG MOSFET. In the asymmetric DG mode of operation, two gate oxide thicknesses are different ( BF tt ,ox,ox ≠ ), they change in phase (difference between the gate oxide thicknesses remains constant). As in the case of the symmetric mode, the boundary conditions for Ψ are obtained as follows: 0Si ,ox eff, ox ),()0,( =∂ Ψ∂ ε= Ψ− ε y B B y yx t xV , (7) Si ),(),( Si ,ox Sieff, ox ty F F y yx t txV =∂ Ψ∂ ε= Ψ− ε , (8) ( ) ibiVy ,,0 =Ψ , (9) ( ) DSibi VVyL +=Ψ ,, . (10) Thus, this is a two-dimensional nonlinear problem of the second order defined inside the channel by the equation (1a) and the boundary conditions at the Si/SiO2 interfaces (Cauchy condition) and the continuity of the potential at the source/drain sides (Dirichlet condition). The integral for Finite Elements formalism is: ∫ ∫ =⎥ ⎦ ⎤ ⎢ ⎣ ⎡ ε + ⋅− ∂ Ψ∂ ∂ ∂ + ∂ Ψ∂ ∂ ∂ −=Ψ 0 )( )( Si dA nNq w yy w xx wR A . (11) This leads to the matrix system: [ ] [ ] [ ] 0)()]([ =Ψ−Ψ⋅=Ψ FKR , (12a) where w represents the weight function, R[Ψ] is the residual vector, [K] is the stiffness matrix, [Ψ] is the vector of the unknown potentials and [F] represents the vector of the field sources, the elementary terms are calculated by: ∫∫ Ω ∇∇= dydxwwK jiij , (12b) ∫ ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ ε + = dydxnNqwF A ii Si )( , (12c) ∑ = −Ψ= r k ikiki FKR 1 . (12d) The nonlinear system (12a) is solved by the Newton-Raphson method [7] assuming the Jacobian matrix [J] terms as: (a) Top Gate Bottom Gate C y y Channel ( (NA) tSi Source (n+) Drain (n+) L x (b) Fig. 1. (a) DG MOSFET structure. (b) DG MOSFET with a coordinate system. Semiconductor Physics, Quantum Electronics & Optoelectronics, 2008. V. 11, N 2. P. 196-202. © 2008, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine 198 ∑ = Ψ∂ ∂ −Ψ Ψ∂ ∂ += Ψ∂ ∂ = r k j i k j ik ij j i ij FK K R J 1 . (13) Expression (13) can be written as: ][][][ FKJ ∆+= . (14) The elementary terms are calculated by: j i ij F F Ψ∂ ∂ =∆ . (15) The mesh element used in our case is triangular with three nodes. 2.2. Semi-analytical (S) model Subthreshold swing, defined as the change of the gate voltage needed for an order-of-magnitude change in the subthreshold drain current, is expressed as: D GS I V S log∂ ∂ = . (16) Assuming is made that the drain current (ID) is proportional to the total amount of free carriers at the virtual cathode, where the channel potential reaches its minimum Ψmin(y) [6]. This latter allows finding the virtual cathode position (xmin) along the channel length and its effect on the total amount of free carriers at the virtual cathode in function of electrical and physical parameters (doping, drain-source and gate-source voltages,…) of DG MOSFET as it is illustrated in Fig. 2, where the cathode position value xmin can be found numerically through 0),( min = ∂ Ψ∂ xx yx . Expression (16) can be transformed [6] to: 1 0 min min 0 min )(exp )(exp 10ln Si − ⎥ ⎥ ⎥ ⎥ ⎥ ⎥ ⎦ ⎤ ⎢ ⎢ ⎢ ⎢ ⎢ ⎢ ⎣ ⎡ Ψβ ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ ∂ Ψ∂ Ψβ = ∫ ∫ dy dy V q KTS sit GS t . (17) Source Drain VDS=0(equilibrium) VDS=0.1V(low) VDS=0.8V(high) VGS x xmin=L/2 xmin L Fig. 2. Virtual cathode position vs the channel length for different drain-source and gate-source potentials (from VGS = 0 to VGS = 0.4 V). 0 5 10 15 20 25 30 0.68 0.69 0.7 0.71 0.72 0.73 0.74 0.75 0.76 0.77 0.78 Vertical Position in Channel (y ) [nm] M in im um P ot en tia l [ V ] Vgs Vgs= 0.4v Vgs= - 0.1v Fig. 3. Variation of the minimum channel potential Ψmin(y) for various gate voltages (VGS): symmetric (a) and asymmetric (b) DG MOSFETs. Therefore, the key to development of an (S) model is to find out the minimum channel potential Ψmin(y) and its dependence on the gate voltage. The calculation of the channel potential by the finite elements method enables us to determine the variation of the minimum potential Ψmin(y), where the minimum channel potential Ψmin(y) can be found through Ψmin(y) = Ψ(xmin, y). Fig. 3 represents the variations of the minimum channel potential Ψmin(y) for various gate voltages (VGS) under various modes of operation (symmetric and asymmetric). The variation of the minimum potential Ψmin(y) according to the gate voltage (VGS) and channel doping concentration (NA) can be given by: Ψmin(y,VGS, NA) = a(VGS, NA)y2 + b(VGS, NA)y + + c(VGS, NA), (18) where a(VGS, NA), b(VGS, NA), and c(VGS, NA) are parameters given according to the gate voltage (VGS) and channel doping concentration (NA). The latter functions can be represented by polynomial approximations: ( ) ∑ = = 1 0 , i i GSiAGS VaNVa , (19a) ( ) ∑ = = 1 0 , i i GSiAGS VbNVb , (19b) ( ) ∑ = = 1 0 , i i GSiAGS VcNVc . (19c) Semiconductor Physics, Quantum Electronics & Optoelectronics, 2008. V. 11, N 2. P. 196-202. © 2008, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine 199 Table 1. Values of the coefficients of the minimum electrostatic potential function Ψmin for symmetric DG MOSFET. NA 5·1014 1015 1016 1017 5·1017 1018 5·1018 )( GSi Va a1 = 56.43·10-5 a0 = 5.54·10-5 a1=61.14·10-5 a0=14.81·10-5 a1 = 0.0006 a0 = –0.0014 a1 = 0.0018 a0 = –0.0192 a1 = 0.0004 a0 = –0.0817 a1 = 0.0005 a0 = –0.1635 a1 = 0.0007 a0 = –0.7386 )( GSi Vb b1 = –0.0113 b0 = 0.0011 b1 = –0.0122 b0 = 0.0030 b1 = –0.0118 b0 = 0.0289 b1 = –0.0366 b0 = 0.3850 b1 = –0.0084 b0 = 1.6344 b1 = –0.0094 b0 = 3.2702 b1 = –0.0132 b0 = 14.7729 )( GSi Vc c1 = 0.1390 c0 = 0.7346 c1 = 0.1390 c0 = 0.9230 c1 = 0.1390 c0 = 4.3131 c1= 0.2018 c0 = 38.0109 c1 = 0.1340 c0 = 188.9474 c1 = 0.1390 c0 = 377.3569 c1 = 0.2000 c0 = 1884.5 Table 2. Values of the coefficients of the minimum electrostatic potential function Ψmin for asymmetric DG MOSFET. NA 5·1014 1015 1016 1017 5·1017 1018 5·1018 )( GSi Va a1 = 18.53·10-5 a0 = –3.74·10-5 a1 = 21.83·10-5 a0 = –4.4·10-5 a1 = 71.69·10-5 a0 = –6·10-4 a1 = 0.0005 a0 = –0.0058 a1 = 0.0006 a0 = –0.0288 a1 = 0.0005 a0 = –0.0576 a1 = –0.0010 a0 = –0.2867 )( GSi Vb b1 = –0.0035 b0 = 0.0007 b1= –0.0042 b0 = 0.0008 b1 = –0.0134 b0 = 0.0068 b1 = –0.009 b0 = 0.0625 b1 = –0.0114 b0 = 0.3071 b1 = –0.0091 b0 = 0.6133 b1 = –0.0288 b0 = 3.0416 )( GSi Vc c1 = 0.1313 c0 = 0.7361 c1 = 0.1349 c0 = 0.9259 c1 = 0.1613 c0 = 4.3986 c1 = 0.1485 c0 = 39.1643 c1 = 0.1549 c0 = 193.6484 c1 = 0.1485 c0 = 386.759 c1= 0.0000 c0 = 1931.6 The parameters ai , bi, and ci are coefficients given for each mode of operation (symmetric and asymmetric). These parameters are summarized in Tables 1 and 2. Plugging (18) into (17) yields to a semi-analytical (S) model. To further simplify this model, two cases need to be studied: 1) symmetric DG mode, 2) asymmetric DG mode. 2.3. Neural estimator The model based on artificial neural network [8] assumes that input and output patterns of the given problem are related by a set of neurons organized in hidden layers. Each neuron called processing unit forward the input values to the output pattern using simple mathematical rules. Neuron input is related to other neuron outputs using the following equation (Einstein notation) ijijklkl OwI = , (20) where Ikl is the input of neuron l from layer k, Oij is the output of neuron j from layer i, wijkl is the weight relating the neuron j and neuron l. This weight parameter represents the strength of the connection between the neurons. The input of each neuron is related to its output according to [9] ( )ijIij e O −+ = 1 1 . (21) This expression states that the neuron transform non-linearly the sum of the other neuron outputs. The sigmoid function used in this transformation is called a transfer function. In this study, input parameters are tox1, tox2, tSi, L and Sym. Each of these parameters is indexed with one neuron. Sym parameter is a classification variable (Sym = 1 for symmetric case and Sym = 0 for the asymmetric case). The output variable is the subthreshold swing (S). Neurons in the network structure are connected with variables called weights. These are to be optimized in order that the network response identifies the correlations between input and output variables. This is performed by an optimization process using the training and test processes. 2.4. Neural computation Neural computation is performed by the training and test processes in which 91 samples submitted to a network structure are used to discover the correlations between input and output parameters. In the training process, the weights are corrected according to the gradient decent algorithm [8]. At the output pattern, the error expression for a given iteration level t ′ is ( )2 2 1 t r t o yyE ′′ −= , (22) where yr and y are the real and predicted responses, respectively. This last expression is called the system energy. The weight update in the output layer is a function of the system energy t mnop t ot mnop w E E ′ ′ ′ ∂ ∂ =∇ . (23) Substituting expression (20) and (22) into (23) gives ( ) ( ) t mn t op t r t mnop OIfyyE ′′′ ′−=∇ ' , (24) where f' is the 1st derivative of the transfer function. A similar expression holds for the hidden layers. For instance, the gradient energy in the case of the second hidden layer is ( ) ( ) ( ) t kl t mn t klmn t op t r t klmn OIfwIfyyE ′′′′′′ ′′−=∇ . (25) The weight update is assumed to depend on the magnitude and direction of the energy gradient. In the case of the output layer, the weight change is Semiconductor Physics, Quantum Electronics & Optoelectronics, 2008. V. 11, N 2. P. 196-202. © 2008, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine 200 1_1 1_2 1_3 1_4 2_1 2_2 2_3 2_4 3_1 3_2 3_3 3_4 4_1 4_2 4_3 4_4 0.000 0.005 0.010 0.015 0.020 0.025 0.030 Residual error (-) N et w or k st ru ct ur e a tox1 tox2 tsi L Sym S tox1 tox2 tsi L Sym tox1 tox2 tsi L Sym S b Fig. 4. (a) Residual error for ANN training for different structures. (X_Y): X – neuron number in the 1st hidden layer, Y – neuron number in the 2nd one. (b) Detailed structure of the optimised neural network. 1 1 −′ ′−′ ′ ′ ∆ ∇−∇ ∇ =∆ t mnopt mnop t mnop t mnopt mnop w EE E w . (26) This expression enhances the calculation by varying the sign and the magnitude of the weight. The error at the output layer is back-propagated in the network structure based on the former calculation of the weight expressions. Fig. 4a shows the evolution of the residual error of network training for different network structures. It is noticed that the highest errors are recorded for small structures. The best compromise was identified for the structure 4_2 (4 neurons in the first hidden layer and 2 neurons in the second hidden layer). Fig. 4b details the optimized structure. 3. Results and discussion 3.1. Symmetric DG MOSFET In the symmetric DG mode of operation, two effective gate voltages are always equal to each other and change simultaneously (VF,eff = VB,eff). Such a mode can be realized either by: – having two gates made of single material and electrically tying them together [10]; – having different gate materials but keeping a constant bias between two gates that compensates the work function difference of the gates [11]. The semi-analytical model of the subthreshold swing (S) that was developed for a DG MOSFET is compared with the analytical models of Chen Qiang et al. [6] and B. Agrawal [4] (Fig. 5), revealing an unusual NA-dependence of S, which is opposite to that in bulk devices. Increasing NA does not compromise, but improves S in DG MOSFET’s within the full depletion range. This dependence can be explained by the location of the effective conducting path (subthreshold current lines) [6]. For high NA values, the dopant induced field is significant (for NA = 2·1018 cm–3 and tSi = 20 nm) such that the surface potential Ψmin(y = 0 and y = tSi) is much greater than the center potential Ψ(y = tSi / 2) and the overall conduction is highly confined to surfaces. One key physical effect neglected in the analysis of this work is the quantum effects of both field confinement and spatial confinement. In heavily doped channel, field confinement in the inversion layer caused by strong electric field shifts electron peaks away from surfaces (Si/SiO2 interfaces) [6], which constitutes one more reason for inaccuracy of our S model for the heavily doped channel (Fig. 5). So, our S model is not suitable for heavily doped devices. With decreasing NA values, a weakened dopant induced field leads to a flatter shape of potential profile such that the effective conducting path (subthreshold current lines) retreats from surfaces into depth, causing weakened gate control and a larger S. Finally, at low NA values (for NA = 1016 cm–3), the potential profile Ψ(y) is virtually determined by the Laplace equation alone. Consequently, the effective conducting path no longer drifts with NA, resulting in a constant (S) value. 1E15 1E16 1E17 1E18 1E19 60 80 100 120 140 160 Limitation of S model Su bt hr es ho ld S w in g (S ) [ m V/ de c] Channel Doping Concentration (NA) [cm-3] Our model Qiang Chen et al [6] Tosaka et al [5] Fig. 5. Doping concentration (NA) dependence of S (L = 30 nm, tox = 1.5 nm, tSi = 20 nm). Semiconductor Physics, Quantum Electronics & Optoelectronics, 2008. V. 11, N 2. P. 196-202. © 2008, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine 201 20 40 60 80 100 120 55 60 65 70 75 80 85 90 95 100 105 Su bt hr es ho ld S w in g (S ) [m V/ de c] Channel Length (L) [nm ] tS i = 10 nm tS i = 20 nm t S i = 30 nm Our m odel Q iang Chen et al [6] Fig. 6. Verification of undoped semi-analytical model (NA = 1016 cm–3, tox = 1.5 nm and VDS = 0.1 V).The inset compares undoped semi-analytical model with Qiang Chen model for three different values of the silicon thickness (tSi = 10 nm, 20 nm, 30 nm and VDS = 0.1 V). For very short channel (L < 80nm), the results of (S) show an exponential evolution with a minimal value of (S) equal to 61 mV/dec (Fig. 6). This increase in (S) can be caused by the appearance of the tunnel current (source/drain) which weakens the control of the channel. In Fig. 6, our semi-analytical model is compared to that of Chen Qiang et al. [6]. This comparison show a good agreement for channels (L > 80 nm) but in the other case (L < 80 nm), the results of (S) show a shift compared to that of Chen Qiang et al. [6] model. This shift can be explained by the strong contribution of the free electron concentration in the subthreshold swing modeling. On the other hand, the subthreshold swing developed in previous works did not show a very good agreement with our neural simulations. This is because the location of the effective conduction path is not accurately modeled for the reason that the free carriers neglected in these models. 3.2. Asymmetric DG MOSFET As expected from the concept of the location of the effective conducting path (subthreshold current lines), asymmetric undoped DG MOSFET shows an improved subthreshold swing (S) in comparison with the symmetric undoped device since the effective conducting path in the asymmetric device tends to be close to one of the Si/SiO2 surfaces (Fig. 7). 3.3. Scaling capability of DG MOSFET Scaling capability of the symmetric undoped DG MOSFET is further illustrated in Fig. 8a, where the minimum channel length versus tSi is projected for S = 100 mV/dec and 70 mV/dec (tox is assumed to be 0.8 nm). Clearly, 10 nm undoped DG MOSFETs are likely to find their first applications in conditions where S = 100 mV/dec is tolerable. The good agreement between Chen Qiang et al. [6] results and ours shows that scaling capability of DG MOSFET can be studied using the neural network approach. 1E15 1E16 1E17 1E18 50 60 70 80 90 100 110 120 Lim itation of S model Su bt hr es ho ld S w in g (S ) [ m V/ de c] Channel Concentration Doping (N A ) [cm-3] Symmetric DG MOSFET Asymmetric DG MOSFET Fig.7. Comparison of the symmetric DG MOSFET S model with the asymmetric one (NA =1016 cm–3, tox,F = 1.5 nm, tox,B = 2 nm and VDS = 0.1 V) Fig. 8b shows the estimated evolution of the scaling capability of the asymmetric undoped DG MOSFET versus different gate oxide thicknesses. This evolution shows the effect of the bottom gate oxide thickness (tox,B) on the law of scaling capability of the asymmetric undoped DG MOSFET, asymmetric undoped DG MOSFET shows an improved scaling capability in comparison with the symmetric undoped device. Clearly, 10 nm asymmetric undoped DG MOSFETs are likely to be used for the condition where S = 70 mV/dec is tolerable. 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 0 10 20 30 40 50 -- predicted with ANNs _ Qiang Chen et al [6] S=70 mV/dec S=100mV/dec Le ng th C ha nn el (L ) [ nm ] Silicon Channel Thickness (tSi) [nm] (a) 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 0 10 20 30 40 50 S=70 mV/dec S=100 mV/dec Le ng th C ha nn el (L ) [ nm ] Silicon Channel Thickness (t Si ) [nm] _ tox,F=1nm and tox,B=1.4nm -- t ox,F =1nm and t ox,B =2.2nm (b) Fig. 8. Minimum channel length as a function of the silicon thickness for symmetric (tox = 0.8 nm) (a) and asymmetric (b) DG MOSFETs. Semiconductor Physics, Quantum Electronics & Optoelectronics, 2008. V. 11, N 2. P. 196-202. © 2008, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine 202 4. Conclusions In this work, we showed the applicability of the neural net approach to the scaling capability of the undoped DG MOSFET problem. This study was based on the study of the effect of the channel length, silicon film thickness and gate oxide thickness on subthreshold swing. A semi- analytical model of the subthreshold swing was built as based on the resolution of the 2D Poisson-Boltzmann nonlinear equation in the channel. The finite element method and polynomial interpolation were considered to solve the problem. The use of this semi-analytical model enabled us to build the required database in order to optimize our Artificial Neural Network (ANN) structure. We are currently extending this model to include the quantum effects (tSi < 5 nm and L < 10 nm). Finally, it is noteworthy that ANN technique has the advantage of being more robust, and independent of a pre-conceived physical model. Hence, ANN could be considered by many people as a “black box” in which physics is overlooked, but the final analysis of the model itself could provide reliable information on the system and further understanding of the physics involved. References 1. International technology roadmap for semiconductors. 2004 edition. Available from http://public.itrs.net/. 2. J. Saint-Martin, A. Bournel, P. Dollfus, Comparison of multiple-gate MOSFET architectures using Monte Carlo simulation // Solid- State Electronics 50, p. 94-101 (2006). 3. K. Kim and J.G. Fossum, Double-gate CMOS: Symmetrical-versus asymmetrical-gate devices // IEEE Trans. Electron Devices 48, p. 294-299 (2001). 4. B. Agrawal, Comparative scaling opportunities of MOSFET structures for gigascale integration (GSI). Ph.D. Dissertation, Rensselaer Polytech. Inst., Troy, NY (1994). 5. Y. Tosaka, K. Suzuki, T. Sugii, Scaling-parameter- dependent model for subthreshold swing S in double-gate SOI MOSFETs // IEEE Electron Device Lett. 15, p. 466-468 (1994). 6. C. Qiang, B. Agrawal, D. Meindl, A comprehensive analytical subthreshold swing (S) model for double-gate MOSFETs // IEEE Trans. Electron Devices 49(6), p. 1086-1090 (2002). 7. C.F. Gerald, Applied Numerical Analysis. Addisson-Wesley Publishing Co., Inc, 1978. 8. F. Djeffal, M. Chahdi, A. Benhaya, M.L. Hafiane, An approach based on neural computation to simulate the nanoscale CMOS circuits: Application to the simulation of CMOS inverter // Solid State Electronics 51(1), p. 26-34 (2007). 9. F. Djeffal, S. Guessasma, A. Benhaya, M. Chahdi, An analytical approach based on neural computation to estimate the lifetime of deep submicron MOSFETs // Semicond. Sci. Technol. 20(2), p. 158-164 (2005). 10. C.H. Wann, R. Tu, Y. Bin et al., A comparative study of advanced MOSFET structures // Symp. on VLSI Technology Digest of Technical Papers, p. 32-33 (June 1996). 11. K.W. Guarini (21 collaborators) // Triple-self- aligned double-gate MOSFETs devices and circuits // IEDM, p. 425-428 (June 2001). List of symbols Semi-analytical model K Boltzmann constant n free electron concentration ni intrinsic electron density, 1.45·1010 cm–3 at 300 K q electron charge tox gate oxide thickness tSi silicon film thickness ID drain current L channel length NA channel doping concentration (of acceptors) ND/S source/drain doping concentration (n+ type) S subthreshold swing T absolute temperature Vbi,i junction built-in voltage between the source/drain and intrinsic silicon VB,eff effective bottom (back) gate voltage VDS drain-to-source voltage VF,eff effective front gate voltage VGS gate-to-source voltage VGS,B bottom (back) gate voltage VGS,F front gate voltage Ψ electrostatic potential referenced to Fermi level Ψmin minimum electrostatic potential Φi work function of intrinsic silicon, 4.71 eV at 300 K ΦMF work function of front gate material ΦMB work function of bottom (back) gate material β = q/KT inverse of thermal potential Artificial Neural Network Ikl input of neuron l from layer k Oij output of neuron j from layer i wijkl weight relating the neuron j and neuron l. t ′ iteration level t oE ′ system energy f' 1st derivative of the transfer function.

A neural computation to study the scaling capability of the undoped DG MOSFET

Репозитарії

Схожі ресурси