Interface model of low temperature plasticity in high uniaxially strained monocrystalline semiconductors

The manifestation of the low temperature plasticity (LTP) in highly uniaxially strained Ge and Si single crystals was deduced from analysis of the both tensoeffect measurements data and defect-selective etching patterns of specimens. An appearance of additional tensoeffect mechanisms after the LTP d...

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Bibliographic Details
Date:2000
Main Authors: Venger, Ye.F., Kolomoets, V.V., Machulin, V.F.
Format: Article
Language:English
Published: Інститут фізики напівпровідників імені В.Є. Лашкарьова НАН України 2000
Series:Semiconductor Physics Quantum Electronics & Optoelectronics
Online Access:http://dspace.nbuv.gov.ua/handle/123456789/121177
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Journal Title:Digital Library of Periodicals of National Academy of Sciences of Ukraine
Cite this:Interface model of low temperature plasticity in high uniaxially strained monocrystalline semiconductors / Ye.F. Venger, V.V. Kolomoets, V.F. Machulin // Semiconductor Physics Quantum Electronics & Optoelectronics. — 2000. — Т. 3, № 3. — С. 291-294. — Бібліогр.: 10 назв. — англ.

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Digital Library of Periodicals of National Academy of Sciences of Ukraine
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Summary:The manifestation of the low temperature plasticity (LTP) in highly uniaxially strained Ge and Si single crystals was deduced from analysis of the both tensoeffect measurements data and defect-selective etching patterns of specimens. An appearance of additional tensoeffect mechanisms after the LTP display we attribute to the generation of electrical active defects of crystalline structure when the applied stress exceed some critical one. We found that under LTP conditions the generated dislocation pile-ups are directly concentrated in the phase-boundary field of some structural imperfections of crystalline lattice. The interface model of LTP phenomenon in monocrystalline semiconductors was proposed for acceptable explanation of the dislocation generation in the initially dislocation-free crystals.