Didactic Version of Program System for Synthesis and Diagnostics of Logic Circuits
The Contribution deals with the Internet application of the program system for the synthesis and diagnostics of logic circuits. Internet application contents description of basic notion, theoretical principles and procedure from area of synthesis and diagnostics of logic circuits. This system compr...
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Цитувати: | Didactic Version of Program System for Synthesis and Diagnostics of Logic Circuits / J. Baca, S. Korecko, J. Poruban, P. Vaclavik// Проблеми програмування. — 2003. — N 3. — С. 53—58. — Бібліогр.: 21 назв. — англ. |
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irk-123456789-13032009-09-01T16:27:04Z Didactic Version of Program System for Synthesis and Diagnostics of Logic Circuits Bača, J. Korecko, S. Poruban, J. Vaclavik, P. Дидактические аспекты программирования The Contribution deals with the Internet application of the program system for the synthesis and diagnostics of logic circuits. Internet application contents description of basic notion, theoretical principles and procedure from area of synthesis and diagnostics of logic circuits. This system comprises also programs for solution of logic circuit synthesis and diagnostic tasks. These programs can run in automatic, demo, didactic and test mode. The evaluation of student answers in didactic and test mode are saved to database, which allows analyzing by students or questions. Also the universal virtual learning environment architecture based on this program system is introduced. Розглядається використання Інтернету для програмної системи синтезу та діагностики логічних схем, яка може працювати в автоматичному, демонстраційному та дидактичному режимах. Описано універсальну віртуальну архітектуру середовища навчання, засновану на даній системі. Рассматривается использование Интернета для программной системы синтеза и диагностики логических схем, которая может работать в автоматическом, демонстрационном и дидактическом режимах. Описана универсальная виртуальная архитектура среды обучения, основанная на данной системе. 2003 Article Didactic Version of Program System for Synthesis and Diagnostics of Logic Circuits / J. Baca, S. Korecko, J. Poruban, P. Vaclavik// Проблеми програмування. — 2003. — N 3. — С. 53—58. — Бібліогр.: 21 назв. — англ. 1727-4907 http://dspace.nbuv.gov.ua/handle/123456789/1303 681.03 en Інститут програмних систем НАН України |
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Дидактические аспекты программирования Дидактические аспекты программирования |
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Дидактические аспекты программирования Дидактические аспекты программирования Bača, J. Korecko, S. Poruban, J. Vaclavik, P. Didactic Version of Program System for Synthesis and Diagnostics of Logic Circuits |
description |
The Contribution deals with the Internet application of the program system for the
synthesis and diagnostics of logic circuits. Internet application contents description of basic notion, theoretical principles and procedure from area of synthesis and diagnostics of logic circuits. This system comprises also programs for solution of logic circuit synthesis and diagnostic tasks. These programs can run in automatic, demo, didactic and test mode. The evaluation of student answers in didactic and test mode are saved to database, which allows analyzing by students or questions. Also the universal virtual learning environment architecture based on this program system is introduced. |
format |
Article |
author |
Bača, J. Korecko, S. Poruban, J. Vaclavik, P. |
author_facet |
Bača, J. Korecko, S. Poruban, J. Vaclavik, P. |
author_sort |
Bača, J. |
title |
Didactic Version of Program System for Synthesis and Diagnostics of Logic Circuits |
title_short |
Didactic Version of Program System for Synthesis and Diagnostics of Logic Circuits |
title_full |
Didactic Version of Program System for Synthesis and Diagnostics of Logic Circuits |
title_fullStr |
Didactic Version of Program System for Synthesis and Diagnostics of Logic Circuits |
title_full_unstemmed |
Didactic Version of Program System for Synthesis and Diagnostics of Logic Circuits |
title_sort |
didactic version of program system for synthesis and diagnostics of logic circuits |
publisher |
Інститут програмних систем НАН України |
publishDate |
2003 |
topic_facet |
Дидактические аспекты программирования |
url |
http://dspace.nbuv.gov.ua/handle/123456789/1303 |
citation_txt |
Didactic Version of Program System for Synthesis and Diagnostics of Logic Circuits / J. Baca, S. Korecko, J. Poruban, P. Vaclavik// Проблеми програмування. — 2003. — N 3. — С. 53—58. — Бібліогр.: 21 назв. — англ. |
work_keys_str_mv |
AT bacaj didacticversionofprogramsystemforsynthesisanddiagnosticsoflogiccircuits AT koreckos didacticversionofprogramsystemforsynthesisanddiagnosticsoflogiccircuits AT porubanj didacticversionofprogramsystemforsynthesisanddiagnosticsoflogiccircuits AT vaclavikp didacticversionofprogramsystemforsynthesisanddiagnosticsoflogiccircuits |
first_indexed |
2025-07-02T04:47:08Z |
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2025-07-02T04:47:08Z |
_version_ |
1836509171919355904 |
fulltext |
Дидактические аспекты программирования
© J. Bača, Š. Korečko, J. Porubän, P. Václavík, 2003
ISSN 1727-4907. Проблемы программирования. 2003. № 3 53
UDC 681.03
J. Bača, Š. Korečko, J. Porubän, P. Václavík
DIDACTIC VERSION OF PROGRAM SYSTEM FOR SYNTHESIS
AND DIAGNOSTICS OF LOGIC CIRCUITS
The Contribution deals with the Internet application of the program system for the
synthesis and diagnostics of logic circuits. Internet application contents description of
basic notion, theoretical principles and procedure from area of synthesis and diagnostics of
logic circuits. This system comprises also programs for solution of logic circuit synthesis
and diagnostic tasks. These programs can run in automatic, demo, didactic and test mode.
The evaluation of student answers in didactic and test mode are saved to database, which
allows analyzing by students or questions. Also the universal virtual learning environment
architecture based on this program system is introduced.
Introduction
A few years ago, information
technologies have begun to apply in
pedagogical process area. The first
applications have been used for
pedagogical process evidence and for
computer-aided teaching. Later, these
ones have led to development of virtual
universities and complex virtual learning
environments where the pedagogical
process is realized through the internet.
In the next chapter the Program
system for synthesis and diagnostics of
logic circuits (SDLC System) is presented.
SDLC System is coming out from the
principles described in [1; 2; 3] and also
from learning environment [4]. This sys-
tem is realized as complex Internet appli-
cation and provides the virtual learning
environment for subjects “Logic Systems“
and “Diagnostics and Reliability of Logic
Systems“ which are lectured at our de-
partment.
In the third chapter the universal
virtual learning environment architecture
based on our experiences from the de-
velopment of the SDLC System is intro-
duced.
1. The SDLC System
The development of this system
has started in year 2000 [5]. First mod-
ules of the SDLC System were realized in
diploma thesis [6; 7; 8; 9; 10; 11; 12; 13;
14; 15; 16; 17; 18; 19]. Detailed descrip-
tion of these modules as well as the de-
scription of the synthesis and diagnostics
process can be found in [5; 20]. Another
four modules, with multi-lingual support,
have been added this year. Currently, af-
ter two years of development work, the
SDLC system consists of 18 modules and
the size of the system is 40MB.
Next sections describe the parts of
the system. This description is not ori-
ented to technological system design but
to aspects important for the pedagogical
process.
1.1. Structure of the SDLC System.
The structure of the SDLC System is
shown on Figure 1. After authentication
of a user (student or instructor) the start
page is shown. This page includes the
hyperlinks to modules and the short de-
scription of each module. It also allows
instructors to see and analyze the results
of the didactic tests made by the stu-
dents. Each module explains one stage of
the process of synthesis and diagnostics
of logic circuits. It also includes the di-
dactic tests to verify student knowledge
about given stage. The results of these
tests are saved in the database and can
be accessed by instructors for analysis
and evaluation of students. The SDLC
system also includes tools for the admini-
stration of databases.
1.2. Modules. The SDLC System
has modular structure. This allows ex-
panding or reducing the system quite
easily – by adding or removing the
modules. It also reduces the downloading
time and memory requirements, because
not the whole system is downloaded but
only the required module. Each module
consists of three basic elements: index
Дидактические аспекты программирования
54
page, curriculum pages and the demon-
stration program.
1.3. Index page. This page serves
as the introduction to the given module. It
includes basic information about module,
its authors as well as the menu with hy-
perlinks to the other parts of module —
curriculum pages and program.
1.4. Curriculum pages. The theory
of the given stage of the synthesis and
diagnostics process is explained on these
pages. It comprises terms, facts, princi-
ples, rules, methods and explanation of
the algorithm of the given stage.
Each curriculum page explains one
part of the theory (one chapter) and is
divided into three areas (Fig. 2):
• Text – title and text of the
chapter. The text includes links to the
glossary and to multimedia resources
(pictures, animations, etc.). The glossary
is web page with alphabetically ordered
definitions of terms used in the explained
area. The glossary is common for all
modules.
• Visualization area – after click-
ing the link in the text the corresponding
picture, animation or the glossary with
...
Module n
Program for the processing and
analysis of the tests results
Authentication
(available subjects)
Database of results of the
tests from didactic and test
Glossary
Program n
A TID
Curriculum
of stage n
I
n
d
e
x
n
Program 1
A TID
Curriculum
of stage 1
I
n
d
e
x
1
...
Database of
users
Start page
(introduction, links to chapters and test results)
Module 1
Key:
– program – web page(s) – database
– hypertext link – data flow
A – automatic mode
D – demonstrative mode
I – instructive (didactic) mode
T – test mode
Fig. 1. The structure of the SDLC System
Дидактические аспекты программирования
55
definition of the corresponding term is
displayed in this area.
• Navigation bar – includes but-
tons for navigation through the chapters
of the curriculum.
1.5. Program. The program imple-
ments the algorithm of the given stage of
the process of synthesis and diagnostics
of logic circuits. It is realized as the Java
applet and can run in automatic, demon-
strative (learning), didactic (instructive)
or test mode. The automatic mode is
used for the process of synthesis and di-
agnostics itself and the other three modes
are used for the pedagogical purposes.
In automatic mode the input data
are written in build-in editor or are
loaded from the input file. Then the algo-
rithm of the given stage is executed and
the results of the execution are displayed.
The results are saved into the output file,
if it is required. The input and output
files are text files so they can be written
or changed using any text editor. The
syntax or these files is simple and easy to
understand. The output file of one pro-
gram is the input file of another program
(from another module), which realizes the
next stage of the process of synthesis and
diagnostics.
In demonstrative mode the algo-
rithm is executed step-by-step and every
step is explained. The execution is
stopped after each step to allow the stu-
dent to see the temporary results and the
description of the step. The execution
continues after clicking the “step“ but-
ton. Student can also skip one or more
steps or terminate the execution.
In didactic mode students can test
their knowledge about the given stage by
answering the questions. There are two
types of questions – theoretical and
practical ones. Theoretical questions ver-
ify the knowledge of the curriculum.
Practical questions verify the knowledge
of the algorithm. These questions are put
to a student during the execution of the
algorithm – instead of the description
there is a question after each step. When
the answer is wrong the student can an-
swer again. After three unsuccessful at-
tempts the right answer is displayed.
Students need not to answer all questions
– they can skip one or more questions.
The results of the test (number of ques-
tions, number of right answers, time
needed to answer the questions, etc.) are
saved into the database.
The test mode is alike the didactic
mode but student cannot correct the
wrong answer and no question can be
skipped. The questions are selected ran-
domly so no students have the same
questions. The results of the test are
saved into the database and are used for
the evaluation of the student knowledge
about the given stage.
2. Universal Virtual Learning
Environment Structure
In this chapter the universal virtual
learning environment architecture based
on the SDLC System is described.
Fig. 3 depicts universal virtual
learning environment architecture. This
architecture presents user part of the new
universal system. This one is divided into
two places. The first place is client side.
Simple system availability is performed
using web browser with 128-bit SSL
support. At the present time, the
computer security is one of basic element
of each program. Client side is divided to
some levels. First level is available for
each web browser user. It just comprises
Visualization
area
Text
Navigation bar
Fig. 2. Design of the Curriculum page
Дидактические аспекты программирования
56
the introduction about this system and it
is possible to login to the system. At the
second level (if you enter to the system
successfully) you can select one of the
available subjects. Availability of subjects
depends on your permission. Moreover,
you can choose your personal setting
where is possible to set language version
(internationalization support), change a
password, etc. If you choose some subject
then the particular subject module will be
available. Modules are the part of third
level.
The module consist of:
• index – chapter outline, chap-
ters list, basic characteristics of a problem;
• curriculum part – the theory of
a subject chapter, the explanation of the
solution of a problem, test questions;
• program – is narrowly adherent
to curriculum part. It comprises anima-
tions, pictures, video, Java applets, etc.;
• navigation bar – the panel for
navigation curriculum part (the program
is controlled by separate navigation
panel). It is hidden in the schema;
• mode selection (A,D,I,T) – this
is probably the most important system
part. The explanation of these modes has
been presented in previous chapter;
DB
(users)
...
Module 1 Module n
Generating and test processing
SSL
...
Client side
Server side
Authentication Authentication
DB
(test results)
DB
(test questions)
SSL SSL
Authentication
Audio, video, animation, picture, Java applet A
Start page
(introduction & authentification)
Main menu
(available subjects, personal setting)
Program 1
A T I D
Curriculum
of subject 1
I
n
d
e
x
1
A
Glossary
A T I D
Curriculum
of subject n
I
n
d
e
x
n
Program n A
Fig. 3. Universal virtual learning environment architecture
Дидактические аспекты программирования
57
• glossary – each module has
individual glossary (one glossary for one
subject).
Server side is used to serve data
(theory, glossary, animation, picture, test,
etc.) to a client. It concerns oneself to:
• authentication – this is impor-
tant in two cases. First case is user login
to system. Second case is user login to
test examination;
• permission – it provide access
to the data according to assigned permis-
sion;
• test generating – this is one of
the most important parts of education
process. Test results are used to enhance
the instructional process in variety of
ways. Questions selection are parameter-
ized over the test area, complexity, score,
etc.;
• test processing – completed
test and test result is saved to database.
The test result is given to the user;
• data administration – this part
is used to manage the temporary and
permanent records.
Conclusion
SDLC System has been developed
at Department of Computers and
Informatics at the Technical University of
Kosice. The main aim is to create system
for arbitrary subject where user has the
opportunity to make decision to work in
any mode defined above. Multilingual
(international) support is one of the main
aims. It leads to using this system by
students in other countries through the
internet.
New (universal) analysis and de-
sign of the system are first steps before
implementation. However, the precision
of these steps processing is very impor-
tant for future work. Our first design pre-
sented in this paper is oriented just to
user view. It is possible that this architec-
ture design will be a bit adjusted, taking
into account the experiences from the
development and use of another
e-learning projects [21]. Loading data to
the system and their administration (user
assigning, setting user permission, etc.)
are over the scope of this paper.
Future work will be oriented to
practical realization of this architecture
where the correctness of the design will
be verified.
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Date received 26.08.03
About authors
Dr. Ján Bača,
Dr. Štefan Korečko,
Dr. Jaroslav Porubän,
Dr. Peter Václavík
Technical University of Košice
Department of Computers and Informatics, Letná
9, 041 20 KOŠICE, Slovak Republic
E-mail: jan.baca@tuke.sk,
stefan.korecko@tuke.sk,
peter.vaclavik@tuke.sk,
jaroslav.poruban@tuke.sk
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