Високопродуктивні матричні та потокові перемножувачі цифрових даних
The algorithms and structures of high-performance matrix-stream multipliers of multi-bit binary numbers are proposed, in which components are used with minimal characteristics of time, hardware and structural complexity. The algorithm of matrix execution of multiplication operations according to the...
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| Datum: | 2019 |
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| Hauptverfasser: | , , , , |
| Format: | Artikel |
| Sprache: | Ukrainian |
| Veröffentlicht: |
Kamianets-Podilskyi National Ivan Ohiienko University
2019
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| Online Zugang: | http://mcm-tech.kpnu.edu.ua/article/view/173747 |
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| Назва журналу: | Mathematical and computer modelling. Series: Technical sciences |
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Mathematical and computer modelling. Series: Technical sciences| Zusammenfassung: | The algorithms and structures of high-performance matrix-stream multipliers of multi-bit binary numbers are proposed, in which components are used with minimal characteristics of time, hardware and structural complexity. The algorithm of matrix execution of multiplication operations according to the structure of the Brown multiplier is developed, which implements the addition operation in a one-bit full binary adder and the formation of transfers at a minimum reachable time interval — one micro-cycle. The algorithm and structure of the current matrix switch with a high level of deployment of computational operations are developed, in the process of loading codes of transitive binary numbers occurs in parallel with procedural matrix recount and coincidence of results. Compared to known structures, stream multipliers can significantly reduce the number of in/out of microelectronic crystals that implement operations for multiplying multi-bit binary numbers |
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