Electrical properties of semiconductor structures with Si nanoclusters in SiO₂ grown by high temperature annealing technology of SiOx layer, X<2
The theoretical and experimental investigations of electrical properties of the SiO₂/Si-ncs/SiO₂/Si structures grown by high temperature annealing SiOx, X<2, have been carried out. The influence of Si cluster growth conditions on frequency dependences of C - V characteristics, static and dynam...
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Інститут фізики напівпровідників імені В.Є. Лашкарьова НАН України
2010
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| Назва видання: | Semiconductor Physics Quantum Electronics & Optoelectronics |
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| Цитувати: | Electrical properties of semiconductor structures with Si nanoclusters in SiO₂ grown by high temperature annealing technology of SiOx layer, X<2 / S.V. Bunak, A.A. Buyanin, V.V. Ilchenko, V.V. Marin, V.P. Melnik, I.M. Khacevich, O.V. Tretyak, A.G. Shkavro // Semiconductor Physics Quantum Electronics & Optoelectronics. — 2010. — Т. 13, № 1. — С. 12-18. — Бібліогр.: 19 назв. — англ. |
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irk-123456789-1176992017-05-27T03:03:12Z Electrical properties of semiconductor structures with Si nanoclusters in SiO₂ grown by high temperature annealing technology of SiOx layer, X<2 Bunak, S.V. Buyanin, A.A. Ilchenko, V.V. Marin, V.V. Melnik, V.P. Khacevich, I.M. Tretyak, O.V. Shkavro, A.G. The theoretical and experimental investigations of electrical properties of the SiO₂/Si-ncs/SiO₂/Si structures grown by high temperature annealing SiOx, X<2, have been carried out. The influence of Si cluster growth conditions on frequency dependences of C - V characteristics, static and dynamic conductance of investigated structures has been clearly observed. As a result of theoretical modeling, C - V dependences have been calculated. The experimentally obtained negative constituent of differential capacitance has been qualitatively described. It has been experimentally found that the SiO₂/Si-ncs/SiO₂/Si structures with the tunnel dielectric layer revealed the effect of memorizing. 2010 Article Electrical properties of semiconductor structures with Si nanoclusters in SiO₂ grown by high temperature annealing technology of SiOx layer, X<2 / S.V. Bunak, A.A. Buyanin, V.V. Ilchenko, V.V. Marin, V.P. Melnik, I.M. Khacevich, O.V. Tretyak, A.G. Shkavro // Semiconductor Physics Quantum Electronics & Optoelectronics. — 2010. — Т. 13, № 1. — С. 12-18. — Бібліогр.: 19 назв. — англ. 1560-8034 PACS 73.61.Cw, Ng http://dspace.nbuv.gov.ua/handle/123456789/117699 en Semiconductor Physics Quantum Electronics & Optoelectronics Інститут фізики напівпровідників імені В.Є. Лашкарьова НАН України |
| institution |
Digital Library of Periodicals of National Academy of Sciences of Ukraine |
| collection |
DSpace DC |
| language |
English |
| description |
The theoretical and experimental investigations of electrical properties of the
SiO₂/Si-ncs/SiO₂/Si structures grown by high temperature annealing SiOx, X<2, have
been carried out. The influence of Si cluster growth conditions on frequency
dependences of C - V characteristics, static and dynamic conductance of investigated
structures has been clearly observed. As a result of theoretical modeling, C - V
dependences have been calculated. The experimentally obtained negative constituent of
differential capacitance has been qualitatively described. It has been experimentally
found that the SiO₂/Si-ncs/SiO₂/Si structures with the tunnel dielectric layer revealed the
effect of memorizing. |
| format |
Article |
| author |
Bunak, S.V. Buyanin, A.A. Ilchenko, V.V. Marin, V.V. Melnik, V.P. Khacevich, I.M. Tretyak, O.V. Shkavro, A.G. |
| spellingShingle |
Bunak, S.V. Buyanin, A.A. Ilchenko, V.V. Marin, V.V. Melnik, V.P. Khacevich, I.M. Tretyak, O.V. Shkavro, A.G. Electrical properties of semiconductor structures with Si nanoclusters in SiO₂ grown by high temperature annealing technology of SiOx layer, X<2 Semiconductor Physics Quantum Electronics & Optoelectronics |
| author_facet |
Bunak, S.V. Buyanin, A.A. Ilchenko, V.V. Marin, V.V. Melnik, V.P. Khacevich, I.M. Tretyak, O.V. Shkavro, A.G. |
| author_sort |
Bunak, S.V. |
| title |
Electrical properties of semiconductor structures with Si nanoclusters in SiO₂ grown by high temperature annealing technology of SiOx layer, X<2 |
| title_short |
Electrical properties of semiconductor structures with Si nanoclusters in SiO₂ grown by high temperature annealing technology of SiOx layer, X<2 |
| title_full |
Electrical properties of semiconductor structures with Si nanoclusters in SiO₂ grown by high temperature annealing technology of SiOx layer, X<2 |
| title_fullStr |
Electrical properties of semiconductor structures with Si nanoclusters in SiO₂ grown by high temperature annealing technology of SiOx layer, X<2 |
| title_full_unstemmed |
Electrical properties of semiconductor structures with Si nanoclusters in SiO₂ grown by high temperature annealing technology of SiOx layer, X<2 |
| title_sort |
electrical properties of semiconductor structures with si nanoclusters in sio₂ grown by high temperature annealing technology of siox layer, x<2 |
| publisher |
Інститут фізики напівпровідників імені В.Є. Лашкарьова НАН України |
| publishDate |
2010 |
| url |
http://dspace.nbuv.gov.ua/handle/123456789/117699 |
| citation_txt |
Electrical properties of semiconductor structures with Si nanoclusters in SiO₂ grown by high temperature annealing technology of SiOx layer, X<2 / S.V. Bunak, A.A. Buyanin, V.V. Ilchenko, V.V. Marin, V.P. Melnik, I.M. Khacevich, O.V. Tretyak, A.G. Shkavro // Semiconductor Physics Quantum Electronics & Optoelectronics. — 2010. — Т. 13, № 1. — С. 12-18. — Бібліогр.: 19 назв. — англ. |
| series |
Semiconductor Physics Quantum Electronics & Optoelectronics |
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2025-07-08T12:39:21Z |
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| fulltext |
Semiconductor Physics, Quantum Electronics & Optoelectronics, 2010. V. 13, N 1. P. 12-18
.
© 2010, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine
12
PACS 73.61.Cw, Ng
Electrical properties of semiconductor structures
with Si nanoclusters in SiO2 grown
by high temperature annealing technology of SiOX layer, X<2
S.V. Bunak, A.A. Buyanin, V.V. Ilchenko, V.V. Marin, V.P. Melnik*,
I.M. Khacevich*, O.V. Tretyak, A.G. Shkavro
Taras Shevchenko Kyiv National University, Faculty of Radiophysics
64, Volodymyrska str., 01601 Kyiv, Ukraine
*V. Lashkaryov Institute of Semiconductor Physics, NAS of Ukraine
41, prospect Nauky, 03028 Kyiv, Ukraine
E-mail: ilch@univ.kiev.ua
Abstract. The theoretical and experimental investigations of electrical properties of the
SiO2/Si-ncs/SiO2/Si structures grown by high temperature annealing SiOX, X<2, have
been carried out. The influence of Si cluster growth conditions on frequency
dependences of VC characteristics, static and dynamic conductance of investigated
structures has been clearly observed. As a result of theoretical modeling, VC
dependences have been calculated. The experimentally obtained negative constituent of
differential capacitance has been qualitatively described. It has been experimentally
found that the SiO2/Si-ncs/SiO2/Si structures with the tunnel dielectric layer revealed the
effect of memorizing.
Keywords: nanocluster, static conductance, dynamic conductance, negative differential
capacitance, memorizing effect.
Manuscript received 25.06.09; accepted for publication 22.10.09; published online 04.12.09.
1. Introduction
In recent years, structures of Si nanoclusters (Si-ncs),
grown inside SiO2 using different technological
methods, attracts great attention of scientists because of
possible prospects to create functionally new devices of
nanoelectronics on their basis [1-3]. When studying the
structures SiO2/Si-ncs/SiO2/Si formed by ion
implantation of Si into SiO2, memory effect [4] and light
emitting diodes (LED) [5] were successfully obtained.
There are cases of analogous structures obtained by high
temperature annealing that reforms SiOX layers, X<2,
described in literature [6].
These technologies have some advantages in regard
to compatibility with standard Si technology. This is one
of the reasons that high temperature annealing is
considered as the actual and perspective method for the
future.
In the most papers, where luminescence in the
structures SiO2/Si-ncs/SiO2/Si were studied, the main
attention was paid to the influence of quantum-sized
level of Si nanoclusters on the appearance of
electroluminescence in the high-energy (blue or
ultraviolet) part of the spectrum [7, 8]. At the same time,
quantum states that always appear at the interfaces
between Si and SiO2, and energy levels related with
existence of separate superfluous Si atoms in SiO2 were
devoted relatively few attention. In the meantime, it is
well-known from the papers about kinetic processes of
creation of Si nanoclusters in SiO2 [9, 10] that structure
always goes through the certain state with inner
extraction of Si from SiOX, X<2, in the course of
annealing. The relatively larger quantity of Si, than it is
necessary for the stoichiometric phase of SiO2, is able to
cause the formation of superfluous Si atoms and
appearance of Si nanoclusters. The speed of migration
process of Si atoms in a dielectric substantially
influences on the process of formation of the interface
states between Si nanoclusters and SiO2 and on the
formation of the separate inserts of Si atoms in SiO2 that
does possible forming the plural inserts of separate Si
atoms in a SiO2 matrix [3, 9].
The main task of this paper was to investigate
electrical properties of the SiO2/Si-ncs/SiO2/Si structures
grown by high temperature annealing SiOX, X<2. With
this purpose, it was theoretically and experimentally
investigated the influence of quantum states formed in
these structures during their annealing on temperature
Semiconductor Physics, Quantum Electronics & Optoelectronics, 2010. V. 13, N 1. P. 12-18
.
© 2010, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine
13
V, Volts
C
ap
a
ci
ta
n
ce
, p
F
Fig. 1. VC characteristics of the structure without a
tunnel dielectric layer at various frequencies of the testing
signal at 293 K.
and frequency dependences of VC characteristics,
static and dynamic conductance of the SiO2/Si-
ncs/SiO2/Si structures.
2. Experimental results and discussion
In this work, two types of structures were investigated.
The structures of the first type were Schottky structures
with thick enough (~800 Å) dielectric layer SiO2 with Si
nanoclusters. The structures of the second type were
distinguished from first type by the existence of an
additional 4.7-nm thick dielectric layer between Si and
SiOX. The additional dielectric layer was created due to
dry thermal oxidation process in the initial Si substrate
before deposition of SiOX layer. As it will be shown
below (see part 2.2), the existence of dry silicon dioxide
layer made very essential influence on electrical
properties of these structures and cause the appearance
of memory effects on the structures of the second type.
SiOX films were deposited using universal vacuum
assembly intended for the production of films from
different materials by the methods of electron-beam and
resistive evaporation. SiOX films were deposited by the
method of resistive evaporation of SiO powder from a
Та container. The temperature of evaporator was 1000-
1200 ºС. Then, Si nanoclusters were formed using high
temperature annealing in nitrogen atmosphere at 1100 ºС
for 10 min. After structure formation, the Al contacts
were created by the method of thermal evaporation.
2.1. The investigation of the structures without
additional dielectric layer
Our experimental investigations were made using a
computer-aided assembly for the measurements of static
and dynamic conductivity and capacitance for various
frequencies of the testing signal. For these purposes, we
used picoamperemeter Keithley 6485 (the range of
measured currents was from ±0.01 pА up to ±21 mА),
LCR measuring device E7-12 and admittance measuring
device INSTEK LCR-817. Both of measuring devices
were able to apply external offset direct voltage from the
source controlled by computer in the wide range of their
values. The amplitude of the testing signal remained
constant (20 mV) for all the measurements with different
signal frequencies. All the temperature measurements
were carried out in flowing nitrogen cryogenic
temperature stabilization system with accuracy not
worse than 0.1 ºC.
2.1.1. The investigation of capacitance of the structures
without any additional dielectric layer
It is well-known [11-15] that charge accumulation and
emission processes related to capture and escape of
electrons are able to make very material effect on
transport and capacitance properties of semiconductor
structures with various nanoobjects, such as quantum
dots or atomic clusters. Such kind of mechanisms is
especially well investigated for the metal-GaAs
structures with InAs quantum dots. The appearance of
specific area with negative components on VC
characteristics for these structures was described in
detail in the literature [12-15]. This effect was clearly
experimentally observed for the metal-GaAs structures
with several layers of InAs quantum dots placed in the
space-charge region of a Schottky diode. The main
reason of this effect consists in the dynamic recharging
of quantum dots due to capture and escape of electrons
at a relatively low frequency of the testing signal. The
decrease in the differential capacitance begins at the
moment when imref crosses the energy level of quantum
dots at some applied external voltage. In relation with
this, on the usually monotonic VC curves a quite
symmetric maximum could be clear observed, which is
obtained at relatively low (0.3–10 kHz) frequencies.
Quite similar effect with a negative component of
differential capacitance appears on VC curve for the
SiO2/Si-ncs/SiO2/Si structures studied in this work for the
0.5–2 kHz frequency of the testing signal. At the same
time, it is necessary to note that the area of capacitance
maximum for these samples looks more asymmetric with
long “tail” pulled out to the region of reverse biases.
The typical VC curve taken for the structures
SiO2/Si-ncs/SiO2/Si at various frequencies of the testing
signal is depicted in Fig. 1.
Being based on the results of VC measurements
shown in Fig. 1, we determined the energy position of
quantum states responsible for the accumulation of the
charge in dielectric appearing additionally in the course
of nanocluster growth by using the well-known
admittance spectroscopy (AS) methods. It is possible to
determine the values of capacitance that correspond to
positions of peaks on VC curves measured at various
temperatures (see Fig. 2). After that, determined using
the standard methods was the activation energy of the
quantum states responsible for the charge accumulation
in dielectric from the slope of the Arrhenius plot. As this
Semiconductor Physics, Quantum Electronics & Optoelectronics, 2010. V. 13, N 1. P. 12-18
.
© 2010, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine
14
charge actually stipulated the frequency dependence of
differential capacitance in the investigated structures, the
activation energy for these levels was calculated by
correlation substantiated in papers [14, 15].
2.1.2. Static and dynamic conductance investigation in
SiO2/Si-ncs/SiO2/Si structures without additional
dielectric
The processes of silicon extraction and migration are
increased in the investigated structures as a result of
increasing the annealing temperature and annealing time
[3, 9]. Therewith, silicon atoms extraction occurs
simultaneously over the thickness of initial SiOX.
Thereby, it is obligatory for such structure to be in
certain state during the process of thermal phase
transformation, when not all the excess silicon atoms,
which would be released from oxygen bonds, will be a
part of Si nanoclusters.
In the course of annealing, there are two
competitive processes occuring in the structure: one part
of Si atoms is directly used for creation of the clusters,
while the other part forms a set of separate Si atom
inclusions, which may be similar to the state of
amorphous Si and can provide a fundamental possibility
of electrical current flowing through the entire structure.
Depending on the technological parameters during
annealing, the specific shares of Si atoms participating in
these two processes can change, thus impacting on the Si
clusters size and on properties of cross-cluster
amorphous Si array built-in SiO2, which in turn
significantly influence on capacitance and transport
characteristics of these structures.
As it can be seen from the graphs given in Fig. 3,
the absolute value of the dynamic conductance,
measured at the frequency 10 kHz, more than 10 times
exceeds static conductance for the same samples.
2.0x10-3 2.5x10-3 3.0x10-3 3.5x10-3
-8
-7
-6
-5
-4
-3
-2
-1
0
L
n
(
F
/T
2 )
1/T
Fig. 2. Arrhenius plot for determination of the activation
energy for trap levels.
-2 -1 0 1 2
-10.5
-10.0
-9.5
-9.0
-8.5
-8.0
-7.5
-7.0
L
o
g
(G
),
S
m
Voltage, V
Dynamic Conductance taken at 10 kHz
Static Conductance
Fig. 3. Dependence of dynamic and static conductances on
voltage for the structure without any additional dielectric layer.
On the assumption that the dynamic conductance
can be associated only with the local percolation currents
in the thick dielectric layer, one can conclude that for a
low amplitude test signal (~20 mV), with which
differential and dynamic capacitance were measured,
there are only bias currents exist in the investigated
structures. As for transport currents that pass through the
entire structure at a constant applied voltage – they are
much lower.
This explanation correlates well with the idea that
quantum states involved in the electric charge
accumulation process are galvanically connected with
each other due to the existence of grid of closely located
nanoclusters and due to separate Si atom inclusions,
which makes the specific conductance to be connected
with hop transport mechanism of charge carriers [6,
9, 10].
Assuming that the grid of individual Si atom
inclusions represents bound percolation cluster that is
formed in the entire dielectric layer, it should be
expected that VI curves for such structures should be
similar to those of а-Si/с-Si heterostructure. Temperature
dependence investigation of VI characteristics
measured at constant voltage makes it possible to
determine the activation energy of conduction currents.
It is close to Ea = 0.3 eV. VI curves for these
structures showed a non-linear dependence on voltage,
although the rectifying effect was very small. VI
curve obtained and its temperature dependence were
quite similar to those previously described in the works
where analyzed are electrical properties of a-Si/c-Si
heterostructures. The activation energy determined from
experiments correlates well with energy parameters
defined in [16, 17] for the a-Si/c-Si interface. This fact
gives reasons to believe that the current passing in the
grid of separate Si atom inclusions in SiO2 occurs by the
same (hopping) mechanism as in amorphous Si. It
should be emphasized that the conductivity dependence
on the applied voltage frequency is typical for hop
conductivity mechanism in “density-of-states tails” in
amorphous semiconductors [18]. Thus, the resulting
Semiconductor Physics, Quantum Electronics & Optoelectronics, 2010. V. 13, N 1. P. 12-18
.
© 2010, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine
15
) tsin(vv 0~
0.3 eV
0.42 еV
ФB
eV0
NCL
Nd
LSiOx
Fig. 4. Schematic band diagram of the potential profile for the SiO2/Si-ncs/SiO2/Si structure.
currents through the entire structure are determined by
the conductivity in the “narrow” places in the
percolation cluster of the separate Si atom inclusion grid.
At the same time, the conductivity of alternating currents
is determined by local characteristics of separate areas,
where the coherence of nanoclusters grid and separate Si
atom inclusions is relatively higher.
The experiments carried out allow to draw the
conclusion that one can observe three different types of
quantum levels in SiO2/Si-ncs/SiO2/Si structures, and
their distribution by energy and concentration can
significantly affect electrical and optical properties of
these structures. They are: quantum-dimensional levels
of nanoclusters, interface quantum levels formed at
boundaries between Si clusters and the surrounding
SiO2, as well as quantum levels belonging to the grid of
separate Si atom inclusions. The latter can conduct the
current, which is rather unusual for a thick (~800 Ǻ)
silicon oxide. The obtained values of activation energies
determined experimentally were used to build a physical
model of SiO2/Si-ncs/SiO2/Si structure, band diagram of
which is shown in Fig. 4.
2.1.3. Modeling the capacitance-voltage characteristics
for SiO2/Si-ncs/SiO2/Si structures without any additional
dielectric layer
Changing the charge on the quantum levels in thick
dielectric when changing the test signal frequency gives
a possibility to understand the origination mechanism of
the negative differential capacitance effect in such
structures, which is typical for these objects.
This simulation was carried out under the
assumption that the spatial distribution of charge
accumulated on quantum levels in this dielectric has
been placed as layers at equal distances from each other
(Fig. 4). This idealization was used only for
discretization of the problem.
The calculation technique of frequency dependences
for the capacitance was previously described in [15], so in
this paper we have described only concept description of
the problem and analysis of the obtained results. During
the calculation, it was taken into account that the charge
accumulated at the interface level can influence on the
potential barrier profile in dielectric, which should
significantly affect the magnitude of the differential
capacitance of the structure. Since relaxation of the charge
captured on the interface levels has certain characteristic
times, it is completely natural that its frequency
dependence takes place. In addition, our calculations show
that the magnitude of this charge may be so considerable
that it could exceed the total integrated amount of the
charge in the space charge region of semiconductor,
which in turn can cause the change of electric field
direction inside the dielectric.
Fig. 5 shows the theoretical curve of capacitance-
voltage dependence, which was obtained by modeling
the structure with the dielectric thickness 210 nm, for
seven cluster layers with the quantum level energy
position close to 0.4 eV, which was counted from a
certain energy level typical for the states in the grid of
separate Si atom inclusions, through which hop transport
of charges occurs over the whole structure.
The calculations carried out agree well with the
results of experimental studies and make it possible to
explain the appearance of the VC peak with its quite
wide half-width and specific dependence “tail” tightened
in the area of reverse voltages.
Semiconductor Physics, Quantum Electronics & Optoelectronics, 2010. V. 13, N 1. P. 12-18
.
© 2010, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine
16
-2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4
465
470
475
480
485
490
C
, p
F
U, V
0.8 kHz
1.5 kHz
3 kHz
Fig. 5. The result of modeling the VC characteristic of
SiO2/Si-ncs/SiO2/Si structure for 7 layers of quantum states
with the activation energy level 0.4 eV.
Since contribution of the quantum states to
capacitance increases slightly with the reverse voltage
increase, the capacitance reduces in the reverse branch of
VC characteristics not so rapidly as in the classic MIS
structures. That’s why, in our view, the “long tail” in the
characteristic depending on VC curve maximum
tightened in the area of reverse voltages has been
observed in experimental VC curves.
2.2. The investigation results of structures with a tunnel
dielectric layer
It should be noted that for the structures with a thin
(~ 4.7 nm) dielectric layer thermally generated on the
silicon substrate before SiOX layer deposition, VC
frequency dependences inherent to structures without
any tunnel dielectric layer were completely absent.
Instead of it, when increasing the reverse voltage applied
to the structure, a gradual CVC shift to the right along
the abscissa axis, where voltage values are marked, was
observed (see Fig. 6).
It means that in the process of applying a certain
reverse bias to the structure, the dielectric region begins
to charge. It means accumulation of charge in it, which
already cannot be changed quickly.
As the transport of charge is practically halted in
these structures, then it is natural to do an assumption
that an accumulation of charge occurs on the quantized
levels of the interface states near nanoclusters, as their
density of states substantially exceeds the density of the
quantum-dimensional states of nanoclusters.
The amount of charge accumulated in the interface
states is gradually increased with increasing the voltage.
The process of charging the structure becomes
considerable when the voltage equals to 5 V and reaches
its maximum at 13 V. The same effect can be attained by
applying short pulses of voltage of the same amplitude
to this structure [19].
-13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2
100.0p
200.0p
300.0p
400.0p
500.0p
600.0p
700.0p
800.0p
900.0p
1.0n
1.1n
C
, F
U, V
Initial state
after 5 V
after 6 V
after 7 V
after 9 V
after 10 V
after 11 V
after 13 V
Fig. 6. VC characteristics of the structure with tunnel
dielectric after the application of a considerable reverse bias
(shift of VC characteristics is related to memorizing
process).
In the absence of the voltage applied to the
structure, with the lapse of time there is a gradual shift of
VC characteristic to the left along the voltage axis. It
means that there is gradual discharging the reservoirs for
accumulation of charge, related to the nanoclusters, as a
result of thermal generation of charge carriers from
quantum levels.
The dynamics of this process is presented in Fig. 7
for a several time values and room (297 K) temperatures.
The process of thermal discharging is considerably more
long as compared with the process of charging and with
a time of measuring the VC curve, that is, actually,
enables to observe it. The complete discharging of the
structure takes place at room temperature approximately
for three days.
On the basis of aforesaid, it is possible to draw a
conclusion that the investigated structure can be
successfully used for the creation of dynamic memory
device. It is necessary also to take into account a
circumstance that the accumulation of charge in these
structures allows to substantially decrease the sizes of
modern memory devices compared with the sizes of
structures created using the effect of charging the
“floating gate”. In addition, as defects in a dielectric
layer cannot influence on discharging of the interface
states near all the nanoclusters simultaneously, these
structures must be more reliable.
It is separately needed to notice that in the
processes of charging (accumulation of charge) and
discharging, the investigated structures demonstrate a
behavior conceptually very similar to that of self-
assembled quantum dots. The interface quantum states
round the Si nanoclusters that can accumulate a
considerable electric charge in itself, like to quantum
dots, are, in fact, zero-dimensional objects where motion
of electrons is bounded in all three dimensions. A main
difference between these objects consists of that for the
Semiconductor Physics, Quantum Electronics & Optoelectronics, 2010. V. 13, N 1. P. 12-18
.
© 2010, V. Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine
17
-8 -7 -6 -5 -4 -3 -2 -1
100.0p
200.0p
300.0p
400.0p
500.0p
600.0p
700.0p
800.0p
900.0p
1.0n
C
, F
U, V
1234
1 - after charging
2 - after 1 hour
3 - after 2.5 hours
4 - complete discharge
(2-3 days)
Fig. 7. The dynamics of discharging process in the
structure with a thin tunnel dielectric layer (recovery of
VC characteristics of structure with time at room
temperature 293 K).
structures of SiO2/Si-ncs/SiO2/Si the quantum states,
where an accumulation of charge is, are in considerably
more wide bandgap material. Therefore, characteristic
times of recharge become considerably longer
(~101 hours).
3. Conclusions
Being based on our analysis of the experimental data, it
is possible to draw the following conclusions.
The view of VC characteristics of the SiO2/Si-
ncs/SiO2/Si structure, measured at low frequencies
(~10 kHz) of the test signal, is similar to VC
characteristics of the Schottky barrier structures based
on GaAs with a several layers of InAs self-assembled
quantum dots. It has been experimentally found that for
the SiO2/Si-ncs/SiO2/Si structures with Si-nanoclusters
without a tunnel dielectric layer an area with a negative
differential capacitance is also present in VC
dependences for low frequencies of measurements. The
effect of negative differential capacitance component for
these structures is expressly observed at room
temperatures within the range of frequencies from 0.5 to
15 kHz when measuring the capacitance. Using the
Arrhenius method, the activation energy of quantum
levels was determined. These quantum levels, by their
physical nature, probably arise up on interfaces between
Si-nanoclusters and SiO2.
As a result of modeling the VC characteristics,
VC dependences are calculated, which qualitatively
describe appearance of an area with the negative
constituent of differential capacitance on them, because
of the influence of interface states that arise between
nanoclusters and dielectric.
It has been experimentally found that the SiO2/Si-
ncs/SiO2/Si structures with the tunnel dielectric
demonstrate the effect of memorizing. The technological
conditions of production of Si-nanoclusters in the
SiO2/Si-ncs/SiO2/Si structures with a tunnel dielectric
are found (Tanneal. = 1100 ºС, t = 10 min), at which these
structures demonstrate aforesaid memorizing properties.
Characteristic voltages of charging (~10 V) and
characteristic times of discharging (~50 hours) are
determined for such structures at room temperatures. It
is assumed that using these structures as memory devices
will allow decreasing the size of storage elements to the
size of a several Si-nanoclusters (~20-30 nm).
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